ał Release 11.04

New targets
* aiT WCET analysis module now available for MPC5668G (z6 core).
* StackAnalyzer module now available for ARM Cortex.

Qualification Support Kits (QSKs)
* One QSK package for all operating systems.
* Added test for the GUI switch "Always read program headers".
* Changed command line interface for run_test.sh by adding the operating system
  as a required first parameter.

ał toolchain
* Reduced memory consumption and increased analysis speed.
  Some analyses may now be 25-50% faster.
* Mapping only allows infinite call string length;
  max-length will be ignored in AIS files.

Minor extension to the XTC specification allowing the selection
of the used core.

ał GUI
* Analysis messages now include the time and memory consumption
  of each analysis step.
* Improved display of analysis messages:
  * easily configurable verbosity
  * improved highlighting of errors and warnings
  * retaining results of analyses performed earlier
  * new menu action to show the selected point in a control flow graph
* New Stack Contribution view.
* Added auto completion for analysis start points in Files view.
* Added global search in all source files.
* Improved error handling (Windows).
* Improved usability of XML query dialogs.
* Improved, consistent filtering and search functionality across all
  Information views (Symbols, Variables, Functions...).
* Fixes for some glitches and crashes related to graph visualization.
* Better handling of machine-setting files and improved annotation generation
  for machine settings.
* Editors: selecting text and hitting Ctrl + F now enables
  searching in the selected text only.
* TraceValidator: user can now visualize traces in trace validation analysis.
* The default names for reports and AIS files are now based on the analysis ID.
* Various fixes and enhancements related to changing or opening a project.
* Interactive value analysis: filter out infeasible contexts.
* Global text report file and analysis text report file may no longer have
  the same filename.
* Improved tab order in GUI.
* aiSee Quick Reference added to the Help menu.
* Target-specific changes:
  * MPC7448/MPC7448s/MPC603e: DRTRY mode settings fixed.
  * MPC5XX: hardware configuration register SRAMMCR has been renamed
            to CRAMMCR_A and CRAMMCR_B.
  * MPC603e: added switch for enabling/disabling 60x bus pipelining.
  * C16x: configure external bus via register contents.
  * V850: allow to choose register mode for the GHS compiler.
          More core specific changes.
  * M68020, x86, H8: added MAP-file entry in the Files view.

* Contexts: the context parameter max-length is now obsolete. The Analyzer
  will always use "max-length=infinite" to increase analysis precision.
  If complexity is too large, decrease max-unroll. Hence, no more "any-history"
  and "...," in the call string outputs.
* ResultCombinator: entry fields for expressions now allow
  C-style and C++-style comments.
* The annotation "area .. features ddr = 1;" is replaced by the more general
 "area .. features memory_type = 'DDR'".
* PCP2: added AIS Quick Reference Guide.

* Fixed the "immediately return" annotation for instructions
  followed by a delay slot.
* Improved debug information for arrays of executables using the DWARF1 format.
* General improvements to reading DWARF1 debug information.
* PPC:
  * more switch table patterns (GHS, DiabData)
  * more computed-call table patterns (DiabData)
  * improved switch table decoding (GHS)
  * allow ASAM file to be read via the --asam-file parameter of exec2crl, and
    ASAM variable names to be written to the report in addition to DWARF names.
* SPARC: improved detection of tail calls.
* V850: improved switch table decoding.

Stack, loop, and value analysis
* Improved automatic loop-bound detection.
* Improved precision of sign extensions for value analysis.
* PowerPC: improved precision of value analysis.
* MPC603e/MPC750/MPC755/MPC7448: improved reporting of speculative
  memory accesses in the XML report for accesses that occur
  in code locations that are found to be infeasible.

Path analysis
* Improved ILP solver (clpsolve).
* "Prediction file based (ILP)" now supports busy waiting loops.
* Removed the GLPK based ILP solver for performance reasons.
* Replaced the pathan2 toolchain with poptimize2ilp.
  Consolidation of tools for path analysis.
* Better handling of program ends in the middle of the program,
  such as external routines.
* More strict call-return constraints. If a routine must always return,
  this is now ensured. This can lead to more tight bounds and a better
  approximation of the WCET path in the graph.

Cache and pipeline analysis
* Optimized memory usage of the pipeline analysis framework.
* Correctly treating computed call targets annotated as

    instruction <program point> target is not analyzed

  as potential program ends.
* Am486:
  * fixed internal errors for infeasible entries to multi-entry loops
  * fixed issues with cache locking for code memory areas
* MPC5xx:
  * Improved handling of memory modules governed by an external
    memory controller.
  * Improved handling of accesses to registers via the internal memory bus.
* MPC755: fixed handling of write-back penalties for data caches.
* MPC755, MPC603e: improved cache access counting.
* MPC603e, PPC750: improved the PCI backend. Assuming a 32-bit
  PCI bus width, 64-bit accesses are now supported by splitting into
  two separate 32-bit accesses.
* PPC750: improved handling of tail instructions.
* TriCore 179x: improved model for burst accesses across DMI.
* V850:
  * The V850E2M CPU subsystem model has been re-implemented according to
    new information from Renesas.
  * The pipeline interlock treatment in the V850E2M pipeline model
    has been refined according to new information from Renesas.

Visualization and reporting
* Matching XSDs and XSLs are bundled for the release in the share/xsd
  directory. Users will always have local available copies.
* Performance improvements to WCET graph visualization.
* Better reporting of assertion violations in value analysis.
* The warning about missing timing behaviour now follows the format:
 "No memory access timing found for
  [code fetch|data read access|data write access]
  of instruction <address>[ to <address range>][, context any-history]."
* Fixed problem with interactive pipeline mode,
  which led to corruption of text and XML reports.
* C33: the annotation "area .. count accesses;" now produces output.

Last modified on 28 April 2011 by alex@absint.com.
Copyright 2011 AbsInt. http://www.absint.com/
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