The WCET bounds computed by aiT are not only safe, but also extremely tight. In other words, overestimation of the actual WCET is kept extremely low. This has been repeatedly proven by our own tests, customer feedback, and independent reviews alike.

Experiment Target processor Average WCET overestimation
aiT Other methods
Review by Airbus MPC755 <25% “useless”
Review on Volvo code C16x 16% 212%
Tests with ASCET ST10 3% -
aiT vs ARMulator ARM7 5% -
WCET Tool Challenge C16x, ARM7, MPC565 7–8% >81%

Review by Airbus France (aiT for PowerPC 755)

AIRBUS logo
“The comparison shows that the WCET [computed by aiT] typically is about 25% higher than the measured time for the same task, the real but non-calculable WCET being in between. Another comparison is worth to mention: the one between aiT’s results and those of Airbus’ traditional method. As predicted when the decision for using aiT was made, the figures obtained by the traditional approach are a lot higher than those produced by the aiT-based method. Actually the overestimation is such that the traditional figures are useless.”

It should be noted that the review is from 2003. aiT has been substantially improved since then, providing for even better results.

Review by Mälardalen University on Volvo code (aiT for C16x)

VOLVO logo

In his master’s thesis titled “Static WCET Analysis of Task-Oriented Code for Construction Vehicles”, Daniel Sehlberg found that aiT over­estimated the measured WCET by an average of only 16%. Volvo’s traditional approach overestimated the WCET of the same tasks by an average of 212%.

Chart showing aiT analysis results vs Volvo’s traditional method vs measured WCET

Tests with ETAS’ ASCET (aiT for ST10)

ETAS logo

aiT supports tight integration with the ASCET modeling tools from ETAS. The user can start aiT directly from the ASCET project editor menu to perform a WCET analysis of the automatically generated ECU code.

The following table shows a comparison of maximal measured run times and WCETs predicted by aiT for a sample engine throttle control module. The module was specified in ASCET and compiled with the TASKING C compiler v7.5 for an ST10F269 microcontroller board. Run times were extracted from bus traces (iSYSTEMS ILA 128 logic analyzer). The experiment showed an average overestimation of only 3%.

Procedure WCET (in cycles) Overestimation
Measured Computed by aiT
1 291 291 0.0%
2 6 6 0.0%
3 26 26 0.0%
4 263 283 7.6%
5 263 283 7.6%
6 263 283 7.6%
7 2980 3138 5.3%
8 133 133 0.0%
9 109 110 0.9%
10 116 117 0.9%

aiT for ARM7 vs ARMulator

ARM logo

The ARMulator is a processor simulator provided by ARM as part of the ARM development toolkit. It enables the developer to evaluate the behavior of a pro­gram for a certain ARM processor without using the actual hardware.

In an experiment performed by Daniel Sandell at the Mälardalen University, the WCET estimates provided by aiT were on average only 5% higher than the simulated results provided by ARMulator.

Program WCET (in cycles) Ratio aiT/ARMulator
ARMulator aiT
Array_complex_updates 2399 2539 1.06
Array_real_updates 1263 1307 1.03
Biquad_one_section 150 167 1.11
Convolution_filter 660 703 1.07
Complex_multiply 172 190 1.10
Complex_update 104 121 1.16
Digital_filter 978 1022 1.04
Dot_product 95 108 1.14
Fibonacci 522 532 1.02
Impulse_response 1520 1598 1.05
Matrix_convolution 7096 7401 1.04
Matrix_product_1 37887 39900 1.05
Matrix_product_2 34787 36800 1.06
Matrix_product_3 317 345 1.09
Matrix_product_4 5185 5442 1.05
Real_update 55 66 1.20
“The aiT tool produced in all cases estimates that were higher than the simulated results. We think this is positive, because it gives an indication that the WCET estimates are safe. It should finally be noted that the WCET estimates have been compared against another hardware model and not against the real hardware.”

WCET Tool Challenge (aiT for C16x, aiT for ARM7, and aiT for PowerPC 565)

ARTIST2 logo

In 2006, aiT participated in the first WCET Tool Challenge, organized by University of Mälardalen and sponsored by the ARTIST2 Network of Excel­lence on Embedded Systems Design. The aim of the challenge was to in­spect and to compare different approaches in analyzing the worst-case execu­tion time. All available tools and prototypes able to determine safe upper bounds for the WCET of tasks have participated.

aiT was the only tool that started for three different real processor architectures. It was the only tool that was able to produce results for all test programs. The results of analyses by aiT were in most cases exceptionally precise. Finding in the challenge was, amongst others, that aiT allows for user-friendly WCET analysis, advises against unrealistic annotations, and provides tight WCET values.

Tool Average WCET overestimation Benchmarks handled Service rate Automation rate Complexity of processor
aiT 7–8% 17/17 100% 54% Simple, medium, very complex
Bound-T n/a 13/17 77% 26% Simple, medium
SWEET n/a 15/17 88% 88% Medium
Chronos 81–89% 13/17 77% 24% Simulated processor
“ aiT was able to handle every kind of benchmark and every test program that was tested in the Challenge. aiT is able to support WCET analysis even for complex processors. […] aiT dem­onstrates its leading position through all its features, which contribute to its position as an industry-strength tool, satisfying the requirements from industry as posed by EADS Airbus and proven by the accomplishment in various projects.”