Latest tool news

Media coverage

  • Elektronik 20/2016
    Höhere Zuverlässigkeit durch Einsatz eines formal verifizierten Compilers”
  • Funktionale Sicherheit 7/2015
    Multicore-CPUs in sicherheits­kritischen Echtzeit­systemen” (PDF)
  • Elektronik automotive 3/2014
    Safely Excluding Serious Errors” (PDF)

Upcoming events

Ongoing projects

  • ARGO
    WCET-aware parallelization of model-based applications for heterogeneous parallel systems
    Tools, platforms, and processes for the development of safety-critical multicore systems
    Affordable safe and secure mobility evolution
    Aggregated quality assurance for systems
    Embedded systems with physical models in the production code software

Recent publications

  • D. Kaestner, X. Leroy, S. Blazy, B. Schommer, M. Schmidt, C. Ferdinand. Closing the gap — the formally verified optimizing compiler CompCert. Proceedings of the 25th Safety-Critical System Symposium SSS 2017, Bristol, UK.
  • B. Dreyer, C. Hochberger, A. Lange, S. Wegener and A. Weiss. Continuous non-intrusive hybrid WCET estimation using waypoint graphs (PDF, 660kB). Proceedings of the 16th International Workshop on Worst-Case Execution-Time Analysis (WCET 2016).
  • H. Falk, S. Altmeyer, P. Hellinckx, B. Lisper, W. Puffitsch, C. Rochange, M. Schoeberl, R. Bo Sørensen, P. Waegemann and S. Wegener. TACLeBench: a benchmark collection to support worst-case execution time research (PDF, 443kB). Proceedings of the 16th International Workshop on Worst-Case Execution-Time Analysis (WCET 2016).
  • M. Schoeberl, S. Abbaspour, B. Akesson, N. Audsley, R. Capasso, J. Garside, K. Goossens, S. Goossens, S. Hansen, R. Heckmann, S. Hepp, B. Huber, A. Jordan, E. Kasapaki, J. Knoop, Y. Li, D. Prokesch, W. Puffitsch, P. Puschner, A. Rocha, C. Silva, J. Sparsø, and A. Tocchi. T-CREST: time-predictable multi-core architecture for embedded systems. Journal of Systems Architecture, 61/2015, pp. 449–471.