Videos

a³ 20.04

  • Support for the DDC-I SCORE compiler (PowerPC) and the Renesas CS+ compiler (RH850/V850)
  • Support for Windows color schemes (dark mode)
  • Relaxed license handling and general improve­ments for ValueAnalyzer
  • New consistency check for stack analyses
  • New running task-mode analysis in TimeWeaver
  • Several improvements to the AIS2 annotation language

Astrée and RuleChecker 20.04

  • Improved reporting of annotation insertion errors
  • Automatic filtering of the assembler statement asm {…}
  • One alarm replaced by a diagnostic rule
  • Improved alarm reporting for RuleChecker C++
  • Rule set T now available for C++


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a³ 19.10

  • GUI improvements 0:40
  • TimeWeaver improvements 4:56
  • Improved value analysis 10:50
  • New and improved annotations 14:04

Astrée and RuleChecker 19.10

  • Blacklisting/whitelisting files and folders in RuleChecker configu­rations 0:26
  • C++ code metrics 2:16
  • Improved alarm reporting 3:01
  • Notifications removed 4:59


a³ 19.04

  • Improved license management 0:22
  • Cross-referencing analysis results 4:18
  • Full project search 11:06
  • Improved DWARF lookup 13:45
  • TimeWeaver improvements 15:14
  • Value analysis for all entry points 20:49


a³ 18.10

  • AIS annotations 0:19:
    • New default mapping 0:26
    • New AIS functors 1:14
    • New annotation scope 4:10
  • GUI improvements 7:42:
    • Interactive analyses 7:42
    • Workspace export 11:39
  • Improvements to TimeWeaver 13:07:
    • Interactive MCDS tracing 15:13
    • Trace streaming demo 16:28


a³ 18.04

  • AIS annotations 0:18:
    • Value partitioning 0:18
    • Annotating call targets from DWARF view 11:36
  • Trace-iterative decoding 15:28
  • GUI improvements 20:42
  • Improvements to TimeWeaver 26:08

Astrée and RuleChecker 18.04

  • Rule checks for C++ code 0:14
  • CompCert integration 3:04
  • macOS support 4:09


a³ 17.10

  • Floating licenses 0:31
  • Concurrent analyses 3:01
  • C++ Virtual Call Target Analyzer 5:38
  • C++ type inheritance graphs 13:17
  • Excluding subgraphs 14:38
  • Hybrid WCET analysis with TimeWeaver 16:49

Astrée and RuleChecker 17.10

  • New comment mode 1:02
  • Dealing with uninitialized reads 7:12
  • Improved wrapper generator 9:47
  • Support for GCC-extended assembly 13:29
  • Improved handling of invalid function calls 16:21
  • Re-categorization of MISRA rules 22:07
  • Improved support for TargetLink 28:06


a³ 17.04

  • Context-sensitive help 0:30
  • New AIS Files view 3:27
  • New Statistics view for timing contributions of code snippets 6:13
  • AIS2 Standard Mode vs AIS1 Legacy Mode 10:29
  • Improved creation of project archives for support requests 12:27
  • Local call-string increase 14:12
  • Unrolling for recursive functions 16:54
  • Irreducible loops and recursions 17:40
  • Support for C++ namespaces 19:58

a³ 16.10

  • Workspaces 0:03
  • Point-and-click annotations 6:02
  • Project file generator 16:18
  • Stack area specifications 19:30
  • Jenkins plugin 21:28
  • Extended AIS annotations 25:59:
    • Collecting initializations 26:03
    • Annotating tail calls 27:56
    • New functors end and offset 28:38

a³ 16.04

  • Automatic variable initialization analysis
  • Advanced C++ support
  • New AIS2 features
  • Memory Usage view
  • Import of ORTI files (OSEK/AUTOSAR)

StackAnalyzer presentation and demo

A 15-minute introduction to finding the worst-case stack usage of tasks in embedded systems.

RuleChecker plugin for KEIL

A short tutorial on installing the RuleChecker plugin in KEIL µVision and running RuleChecker from within your µVision environment.



WCET analysis on modern processors

Part 1: Introduction

An introduction to statically determining the worst-case timing behaviour of tasks in safety-critical embedded systems running on modern high-end processors.

Part 2: aiT WCET Analyzer

Tool presentation and demo of static WCET analysis of an example application for the Infineon AURIX architecture.


Part 3: TimeWeaver

Tool presentation and demo of hybrid WCET analysis of an example application for the Infineon AURIX architecture.



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