Dr. Daniel Kästner

Dr. Daniel K&aml;stner

Lebenslauf

Daniel Kästner, Jahrgang 1973, studierte Informatik und BWL an der Universität des Saar­landes. 1997 schrieb er seine Masterarbeit über die Codeerzeugungsmethoden für digitale Signalprozessoren, die 1999 mit dem VDI-Saar-Preis ausgezeichnet wurde. 2000 vollendete er seine Doktorarbeit über die Codeoptimierung für eingebettete Prozessoren, für die er 2002 den SaarLB-Science-Award erhielt.

Dr. Kästner ist einer der Mitgründer von AbsInt und seit 2003 Leiter der technischen Entwicklung.

2007 und 2012 hielt er als Gastdozent an der Universität des Saarlandes Vorlesungen und Fortgeschrit­tenen­kurse über die Ent­wicklung sicherheits­kritischer einge­betteter Systeme.

Aktuell ist Dr. Kästner Mitglied der MISRA-C- und MISRA-SQM-Arbeitsgruppen sowie der ISO-26262- und IEC-61508-Arbeitsgruppen zur Softwaresicherheit.

Ferner war er Mitglied im Programmkommittee vieler in­ternationaler Konferenzen, darunter:


Sie treffen Dr. Kästner auch immer wieder auf den zahlreichen Messen und Ausstellungen, auf denen AbsInt jedes Jahr vertreten ist.

Forschungsinteressen

  • Funktionale Sicherheit
  • Cybersecurity
  • Programmanalyse
  • Laufzeitfehleranalyse
  • Compiler-Design
  • Compiler-Verifikation
  • Abstrakte Interpretation
  • WCET-Analyse
  • Mikroprozessormodellierung
  • Task-Scheduling für Echtzeitsysteme
  • Codeerzeugung und -optimierung

In diesen Interessens­gebieten ist Dr. Kästner Autor oder Mitautor von mehr als 70 begutachteten Veröffentlichungen.

Ausgewählte Veröffentlichungen


  • D. Kästner, C. Ferdinand. Applying Abstract Interpretation to Verify EN-50128 Software Safety Requirements. First International Conference on Reliability, Safety, and Security of Railway Systems — Modelling, Analysis, Verification, and Certification, RSSRail 2016, Paris, France, June 28-30, 2016.
  • D. Kästner, C. Ferdinand. Proving the Absence of Software-Induced Memory Corruption. In Mike Parsons and Tom Anderson, editors, Developing Safe Systems. Proceedings of the Twenty-fourth Safety-critical Systems Symposium, pages 383–399, Brighton, UK, Feb 2016. Safety-Critical Systems Club.
  • A. Miné, L. Mauborgne, X. Rival, J. Feret, P. Cousot, D. Kästner, S. Wilhelm, C. Ferdinand. Taking Static Analysis to the Next Level: Proving the Absence of Run-Time Errors and Data Races with Astrée. In ERTS 2016: Embedded Real Time Software and Systems, 8th European Congress, Jan 2016, Toulouse, France.
  • X. Leroy, S. Blazy, D. Kästner, B. Schommer, M. Pister, C. Ferdinand. CompCert — A Formally Verified Optimizing Compiler (Best Paper Award). In ERTS 2016: Embedded Real Time Software and Systems, 8th European Congress, Jan 2016, Toulouse, France.
  • S. Salvi, D. Kästner, T. Bienmüller, C. Ferdinand. Exploiting Synergies between Static Ana­lysis and Model-Based Testing (Distinguished Paper Award). Proceedings of the 11th European Dependable Computing Conference (EDCC’15). IEEE Computer Society Press, Sept. 2015.
  • D. Kästner, J. Pohland. Program Analysis on Evolving Software. In Matthieu Roy, editor, CARS 2015 — Critical Automotive applications: Robustness & Safety, Paris, France, September 2015. Published in the open-access publication archive HAL.
  • D. Kästner. Applying Abstract Interpretation to Demonstrate Functional Safety. In Boulanger, J.-L., editor, Formal Methods Applied to Industrial Complex Systems, ISTE/Wiley, London, UK, 2014.
  • S. Salvi, D. Kästner, T. Bienmüller, C. Ferdinand. True Error or False Alarm? Refining Astree’s Abstract Interpretation Results by EmbeddedTester’s Automatic Model-based Testing. Proceedings of the ERCIM/EWICS/ARTEMIS Workshop on Dependable Embedded and Cyber-physical Systems and Systems-of-Systems (DECSoS’14), Florence, 2014. Springer LNCS vol. 8696, Springer, Heidelberg.
  • D. Kästner, C. Ferdinand. Proving the Absence of Stack Overflows. In SAFECOMP’14: Proceedings of the 33rd International Conference on Computer Safety, Reliability and Security (SAFECOMP), Florence, 2014. Springer LNCS 8666, Springer, Heidelberg.
  • Daniel Kästner, Udo Brockmeyer, Markus Pister, Stefana Nenova, Tom Bienmüller, Andreas Dereani, Christian Ferdinand. Combining Model-based Analysis and Testing. Embedded Real Time Software and Systems Congress ERTS2, Toulouse, 2014.
  • Daniel Kästner, Markus Pister, Gernot Gebhard, Christian Ferdinand. Reliability of WCET Analysis. Embedded Real Time Software and Systems Congress ERTS2, Toulouse, 2014.
  • D. Kästner, C. Rustemeier, U. Kiffmeier, D. Fleischer, S. Nenova, R. Heckmann, M. Schlickling, C. Ferdinand. Model-Driven Code Generation and Analysis. SAE World Congress 2014.
  • Daniel Kästner, Markus Pister, Gernot Gebhard, Marc Schlickling, Christian Ferdinand. Confidence in Timing. Proceedings of the Safecomp 2013 Workshop: Next Generation of System Assurance Approaches for Safety-Critical Systems (SASSUR), Toulouse, 2013.
  • D. Kästner, C. Ferdinand. Static Verification of Non-Functional Software Requirements in the ISO-26262. Automotive — Safety & Security 2012. Sicherheit und Zuverlässigkeit für auto­mobile Informationstechnik. Internationale Tagung der Fachgruppen Ada, ENCRESS und EZQN der Gesellschaft für Informatik, Karlsruhe, November, 2012.
  • R. Heckmann, C. Ferdinand, D. Kästner, S. Nenova. Architecture Exploration and Timing Estimation during Early Design Phases. International Journal on Software Tools for Tech­nology Transfer (STTT), SpringerLink OnlineFirst, 2012, DOI: 10.1007/s10009-012-0248-8.
  • D. Kästner, M. Schlickling, M. Pister, C. Cullmann, G. Gebhard, R. Heckmann, C. Ferdinand. Meeting Real-Time Requirements with Multi-Core Processors. Safecomp 2012 Workshop: Next Generation of System Assurance Approaches for Safety-Critical Systems (SASSUR), Magdeburg, September 2012.
  • D. Kästner, C. Ferdinand. Safety Standards and WCET Analysis Tools. Embedded Real Time Software and Systems Congress ERTS2, Toulouse, 2012.
  • M. Dierkes, D. Kästner. Transferring Stability Proof Obligations from Model Level to Code Level. Embedded Real Time Software and Systems Congress ERTS2, Toulouse, 2012.
  • D. Kästner, C. Ferdinand. Efficient Verification of Non-Functional Safety Properties by Abstract Interpretation: Timing, Stack Consumption, and Absence of Runtime Errors. Proceedings of the 29th International System Safety Conference ISSC2011, Las Vegas, 2011.
  • D. Kästner, C. Ferdinand, R. Heckmann, M. Jersak, P. Gliwa. An Integrated Timing Analysis Methodology for Real-Time Systems. SAE World Congress 2011.
  • D. Kästner, C. Ferdinand. Using Code Analysis Tools for Software Certification. Embedded World Congress 2011, Nürnberg, 2011.
  • D. Kästner, S. Wilhelm, S. Nenova, P. Cousot, R. Cousot, J. Feret, L. Mauborgne, A. Miné, X. Rival. Finding all Runtime Errors in C-Code. Embedded World Congress 2011, Nürnberg, 2011.
  • D. Kästner, R. Heckmann, C. Ferdinand. 100% Coverage for Safety-Critical Software — Efficient Testing by Static Analysis. Proceedings of the 29th International Conference on Computer Safety, Reliability and Security (SAFECOMP), Vienna, 2010.
  • D. Kästner, S. Wilhelm, S. Nenova, P. Cousot, R. Cousot, J. Feret, L. Mauborgne, A. Miné, X. Rival. Astrée: Proving the Absence of Runtime Errors. Embedded Real Time Software and Systems Congress ERTS2, Toulouse, 2010.
  • C. Ferdinand, R. Heckmann, M. Jersak, D. Kästner, K. Richter. Integration of Code-Level and System-Level Timing Analysis for Early Architecture Exploration and Reliable Timing Verification. Embedded Real Time Software and Systems Congress ERTS2, Toulouse, 2010.
  • C. Ferdinand, R. Heckmann, D. Kästner, S. Nenova. Architecture Exploration and Timing Estimation During Early Design Phases. Embedded World Congress, Nuremberg, 2010.
  • D. Kästner. Nachweis der Abwesenheit von Laufzeitfehlern mit Astrée. Design & Elektronik, 2010.
  • P. Gliwa, D. Kästner, M. Jersak. Das Zeitverhalten von Echtzeitsystemen im Griff. ElektronikPraxis Marktreport Embedded Systeme, February 2010.
  • S. Nenova, D. Kästner. Worst-Case Timing Estimation and Architecture Exploration in Early Design Phases. Proceedings of the 9th International Workshop on Worst-Case Execution-Time Analysis, Dublin, 2009.
  • D. Kästner, C. Ferdinand, S. Wilhelm, S. Nenova, O. Honcharova, P. Cousot, R. Cousot, J. Feret, L. Mauborgne, A. Miné, X. Rival, E.-J. Sims. Astrée: Nachweis der Abwesenheit von Laufzeitfehlern. Proceedings of the GI workshop “Entwicklung zuverlässiger Software-Systeme”, Vol. 29 of Softwaretechnik-Trends, Regensburg, August 2009.
  • D. Kästner. Vermeiden von Laufzeitfehlern in eingebetteter Software. atp Edition Automatisierungstechnische Praxis 10–11/2009, Oldenbourg Industrieverlag.
  • P. Gliwa, D. Kästner, K. Richter. Entwicklungsmethodik für zuverlässige, kostenoptimierte Echtzeitsysteme. 1st Elektronik automotive congress, Munich, 2009.
  • D. Kästner, C. Ferdinand. Timing Predictability of Embedded Systems. Embedded World Congress, Nuremberg, 2009.
  • D. Kästner, R. Wilhelm, R. Heckmann, M. Schlickling, M. Pister, M. Jersak, K. Richter, C. Ferdinand. Timing Validation of Automotive Software. 3rd International Symposium on Leveraging Applications of Formal Methods, Verification and Validation (ISOLA), Kassandra, Greece, 2008.
  • C. Ferdinand, R. Heckmann, and D. Kästner. Static Memory and Timing Analysis of Embedded Systems Code. Proceedings of The IET Conference on Embedded Systems at Embedded Systems Show (ESS) 2006, Birmingham.
  • D. Kästner. Postpass Software Compaction. In: Caspar Grote, editor, Kfz-Elektronik: Begleittexte zum Entwicklerforum, 16. Mai 2006, Ludwigsburg. Poing, Design & Elektronik, 2006.
  • D. Kästner. Mehr Effizienz durch weniger Speicherbedarf. D&V Kompendium. Munich, Publish-Industry Verlag, 2005.
  • M. Pister and D. Kästner. Generic Software Pipelining at the Assembly Level. Proceedings of the 9th International Workshop on Software and Compilers for Embedded Systems (SCOPES 2005), ACM International Conference Proceeding Series 136, pages 50–61. New York, ACM Press, 2005.
  • D. Kästner. Compilation for Embedded Processors. European Summer School on Embedded Systems, 2003. MRTC Report no 119/2004. Mälardalens Högskola. ISSN 1404-3401.
  • N. Fritz, D. Kästner, F. Martin. Automatically Generating Value Analyzers for Assembly Code. Workshop on Compilers and Tools for Constrained Embedded Systems (CTCES), San Jose, 2003.
  • B. Decker, D. Kästner. Reconstructing Control Flow from Predicated Assembly Code. International Workshop on Software and Compilers for Embedded Systems (SCOPES), 2003.
  • Daniel Kästner. TDL: A Hardware Description Language for Retargetable Postpass Opti­mi­zations and Analyses. ACM SIGPLAN/SIGSOFT Conference on Generative Programming and Component Engineering (GPCE), 2003.
  • C. Ferdinand, D. Kästner, F. Martin, M. Langenbach, M. Sicks, S. Wilhelm, N. Fritz, S. Thesing, F. Fontaine, H. Theiling, R. Wilhelm. Validierung des Zeitverhaltens von kritischer Echtzeit-Software. Workshop: Automotive SW Engineering & Concepts. 33. Jahrestagung der GI, Frankfurt/M. Informatik 2003 — Innovative Informatikanwendungen, Band 1 (ISBN 3-88579-363-6), Lecture Notes in Informatics (LNI), 2003.
  • B. De Bus, D. Kästner, D. Chanet, L. Van Put, and B. De Sutter. Post-Pass Compaction Techniques. Communications of the ACM, vol. 46, issue 8, pages 41–46, August 2003.
  • Daniel Kästner, Stephan Wilhelm. Generic Control Flow Reconstruction from Assembly Code. Proceedings of the ACM SIGPLAN Joined Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES’02) and Software and Compilers for Embedded Systems (SCOPES’02), Berlin, 2002.
  • Daniel Kästner. Compiler Optimizations by ILP-based Approximations. SIAM Conference on Optimization, Toronto, 2002.
  • Daniel Kästner, Sebastian Winkel. ILP-based Instruction Scheduling for IA-64. Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers and Tools for Embedded Systems, Utah, 2001.
  • Daniel Kästner. ILP-based Approximations for Retargetable Code Optimization. Proceedings of the 5th International Conference on Optimization: Techniques and Applications (ICOTA 2001), Hong Kong, 2001.
  • Daniel Kästner. Retargetable Postpass Optimisation by Integer Linear Programming. PhD Thesis. Verlag Pirrot, Saarbrücken, 2000. ISBN 3-930714-55-8.
  • Daniel Kästner. PROPAN: A Retargetable System for Postpass Optimisations and Analyses. Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers and Tools for Embedded Systems, Vancouver, CA, June 2000.
  • Daniel Kästner, Marc Langenbach. Code Optimization by Integer Linear Programming. Proceedings of the 8th International Conference on Compiler Construction, Amsterdam. LNCS 1575, pages 122–136, Springer, 1999.
  • Christian Ferdinand, Daniel Kästner, Marc Langenbach, Florian Martin, Michael Schmidt, Jörn Schneider, Henrik Theiling, Stephan Thesing, and Reinhard Wilhelm. Run-Time Guarantees for Real-Time Systems — The USES Approach.. Proceedings of the ATPS99, Paderborn, Germany.
  • Daniel Kästner, Stephan Thesing. Cache-Aware Pre-Runtime Scheduling. Journal of Real-Time Systems, vol. 17, 1999.
  • Daniel Kästner, Reinhard Wilhelm. Operations Research Methods in Compiler Backends. Journal of Mathematical Communications, 1999.
  • Daniel Kästner, Stephan Thesing. Cache Sensitive Pre-Runtime Scheduling. Proceedings of the ACM SIGPLAN Workshop on Languages, Compilers and Tools for Embedded Systems, Montreal, CA. LNCS 1474, pages 131–145, Springer, 1998.
  • Daniel Kästner, Marc Langenbach. Integer Linear Programming vs. Graph-Based Methods in Code Generation. Technical Report A/01/98. Saarland University, 1998.
  • Daniel Kästner. Instruktionsanordnung und Registerallokation auf der Basis ganzzahliger linearer Programmierung für den digitalen Signalprozessor ADSP-2106x. Master’s Thesis. Saarland University, 1997.